IEEE 1588 Time Stamping

Macnica's 1588 time stamping IP core provides 1588 compliant time stamping when an appropriate PHY is not available. As part of a larger design or as a stand-alone FPGA, the IP correctly inserts the timestamp value into outgoing timestamp packets and tracks arrival time of incoming packets. Complete with a standard MDIO interface, 1588 functionality is quickly added to existing designs, and integrates easily with existing 1588 software stacks. Support for 1G or 10G Ethernet is available.

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