Terasic's Intel Agilex I-Series development kit for assessing transceiver performance
The Intel Agilex® 7 FPGA I-Series Transceiver SoC development kit provides a comprehensive design environment encompassing both hardware and software for working with Intel Agilex® 7 FPGA I-Series, featuring 4x F-Tiles. This kit is tailored for evaluating Intel Agilex® 7 FPGA I-Series SoC designs, incorporating the hard processor system (HPS). It allows engineers to assess F-Tile FGT and FHT transceiver performance, generate and check pseudo-random binary sequence (PRBS) patterns, dynamically adjust differential output voltage (VOD) pre-emphasis and equalization settings, and conduct jitter analysis. The development board, mounted with Intel Agilex® 7 FPGA I-Series, features key connectors such as FMC+, MXPM, MCIO, HD-BNC, QSFP-DD, and QSFP-DD800, offering flexibility for protocol support in Video and Vision, JESD204C, SerialLite IV, CPRI, and other major standards.
Features:
- HPS Integration: Evaluate Intel Agilex® 7 FPGA I-Series SoC designs with integrated hard processor system (HPS).
- Transceiver Performance: Assess F-Tile FGT and FHT transceiver performance for optimized functionality.
- PRBS Pattern Generation: Generate and check pseudo-random binary sequence (PRBS) patterns for signal testing.
- Dynamic VOD Adjustment: Dynamically change differential output voltage (VOD) pre-emphasis and equalization settings.
- Protocol Support: Design for flexible protocol support in Video and Vision, JESD204C, SerialLite IV, CPRI, and other major standards.
