Treinamento FPGA Avançado

Treinamento FPGA Avançado

Treinamento FPGA Altera Etapa 02

intel

Um curso online e ao vivo com parte teórica e prática utilizando o kit DE10-Lite (incluso na inscrição).

Curso de nível avançado, no qual os alunos aprendem a usar a ferramentas Platform Designer (QSYS) disponível no software Quartus Prime e o processador embarcado NIOS V, baseado na arquitetura RISC V. 

Um curso de 20 horas com parte teórica e prática utilizando o kit DE10-Lite. 

Macnica DHW é o Centro Oficial de Treinamento FPGA Altera na América do Sul.

Ementa simplificada:

Platform Designer

  • Introduction to Platform Designer 
  • Getting Started with Platform Designer
  • Platform Designer GUI - Basic Usage 
  • Platform Designer Interconnect 
  • Platform Designer GUI – Advanced Usage 
  • IP Catalog ”Off-the-Shelf” Components
  • Platform Designer Standard Interfaces & Signaling 
  • Custom Components
  • System Console & Unified Toolkit (UTK) Framework 

NIOS V Processor

  • Introduction to Nios® V Processor Architecture
  • FPGA Hardware Design Flow
  • Software Build Tools and System Design with Nios® V Processor
  • Booting and Configuration Options

Ementa detalhada

Platform Designer

  1. Introduction to Platform Designer 
  2. Getting Started with Platform Designer
    • Platform Designer user interface (UI) 
    • System generation and output files 
    • Platform Designer in the FPGA design flow 
  3. Platform Designer GUI - Basic Usage 
    • Project 01 – Using Platform Designer and IPs 
  4. Platform Designer Interconnect 
  5. Platform Designer GUI – Advanced Usage 
    • Project 02 – Creating clock domain  
  6. IP Catalog ”Off-the-Shelf” Components
    • IP Catalog ”Off-the-Shelf” Components
    • Commonly used IPs 
  7. Platform Designer Standard Interfaces & Signaling 
  8. Custom Components
    • Creating Custom Components 
    • Component Editor 
    • Project 03 – Creating a PWM IP 
  9. System Console & Unified Toolkit (UTK) Framework 
    • Project 04 – Use of System Console

NIOS V Processor

  1. Introduction to Nios® V Processor Architecture
    • What is Nios® V Processor? 
    • Description and Architecture 
  2. FPGA Hardware Design Flow
    • Creating a Nios® V processor design with Platform Designer in Intel® Quartus® Prime Software 
    • Integrating the design to an Intel® Quartus® Project 
  3. Software Build Tools and System Design with Nios® V Processor
    • Nios® V Processor Software Development Flow
    • Project 01 - Insert and Configure the NIOS V in the system 
    • Nios® V Processor BSP Editor and Generation 
    • Project 02 - Create and modify BSP and generate CMAKE and MAKE files 
    • Application Project 
    • Intel® FPGA Embedded Development Tools 
  4. Booting and Configuration Options
    • Nios® V Booting Flow 
    • Nios® V Booting Methods 
    • Project 03 - Compile application and run on hardware