New Class of Adaptive SoCs
Versal® ACAP integrates capabilities that far exceed those of conventional CPUs, GPUs, and FPGAs, enabling adaptive, domain specific architectures to accelerate whole applications
An Architecture Ahead
Surpassing the limits of Moore’s Law and traditional FPGA architectures, Versal ACAP uniquely delivers unprecedented hard IP integration and SW programmable silicon infrastructure
Key innovations deliver unparalleled application- and system-level value for cloud, network, and edge applications at the forefront of their markets
Featured White paper
This white paper provides both a qualitative and quantitative analysis of Versal ACAP system-level capabilities for a host of markets ranging from cloud to wired networking and 5G wireless infrastructure.
Learn how the Versal architecture delivers best-in-class performance/watt leadership over competing 10nm FPGA architectures in end-applications such as AI compute accelerator, 5G Massive MIMO, network accelerator, smart SSDs, and multi-terabit SmartPHY—supported with data that can be validated with public tools.
AN ARCHITECTURE AHEAD
SW Programmable Silicon Infrastructure
ACAPs have been built from the ground-up to be natively software programmable without needing to know RTL (register-transfer level) languages or FPGA architectures. The platform is readily accessible to software developers and data scientists using their preferred tool flows, while providing an accelerated development path for hardware designers.
Key to the platform’s ease of programming is the integrated shell—consisting of a platform management controller, hardened host interface (integrated PCIe® w/DMA), memory controllers, and network interfaces interconnected with a multi-terabit, memory mapped programmable network on chip (NoC) for massive data flow and instant connectivity to compute and network infrastructure. The integrated shell delivers pre-engineered timing closure and logic resource savings so developers can focus on their key differentiation.
Unprecedented Integration of Hardened, Domain-Specific IP
With 3X more hardened IP than competing 10nm FPGAs, Versal ACAPs feature a common hardened infrastructure across all devices for ease of programming and code portability, as well as domain-specific hardened IP for diverse markets.
The balance of adaptable hardware and hardened cores delivers performance/watt leadership for leading applications in cloud, network, and edge, all while retaining hardware flexibility to adapt to changing requirements and market dynamics.
Run Benchmarks of Versal ACAPs vs. Competing FPGAs as Cited in White Paper
GET STARTED WITH THE PORTFOLIO
Featuring unprecedented integration of networked cores for the most challenging compute and networking application, the Versal Premium series is sampling now. Contact your local sales representative to apply for the Early Access program or visit the Contact Sales page.
Delivering hyper integration of fast memory, secure data, and adaptive compute for compute intensive, high bandwidth applications, the Versal HBM series is now in Early Access. Contact your local sales representative to apply for the Early Access program or visit the Contact Sales page.
Versal AI RF Series Coming Soon