AB07-USB3FMC-1.8VIF exposes a USB 3.0 PHY through an FMC header so you can evaluate the USB 3.0 IP on compatible FPGA platforms with 1.8 V I/O. The board keeps the pinout and PHY interface consistent with the broader AB07 family while matching voltage requirements for specific carriers.
Tell us your carrier, FMC type, and USB test plan. We will provide a compatible build and a quick start flow.