Macnica ME10 SoC
IPMX Transceiver SoC for HDMI 2.0 products
Get to market fast, with the standard in silicon.
Overview
Customers are asking for IPMX by name, and the first wave of IPMX products is forming now. Every quarter you spend building a transport layer from the standards documents, or integrating IP cores, is a quarter a competitor spends shipping.
The ME10 is IPMX as a single SoC: the entire transport layer finished, in silicon and in firmware Macnica maintains. Design it in like any AV over IP chip, with no IP cores to integrate and no proprietary ecosystem attached. The same 23 x 23 mm part configures as a sender or a receiver, so one chip serves both ends of the link, and a product built on it can be set to either role in the field.
The Gateway Kit
Evaluate on certified hardware. The ME10 Gateway Kit is a complete, working IPMX gateway built on the ME10, and in August 2026 it passed IPMX product certification at the EBU-hosted test event in Geneva. Certification is granted to complete products rather than to components, so the kit's result is the validation of the IPMX implementation inside this SoC. Evaluate IPMX on the kit, develop against it, and carry its design into your own product, or design the SoC in directly with the same implementation underneath.
- HDMI 2.0 to IPMX transceiver, configurable as sender or receiver
- Up to 4K60p, RGB and YUV 4:4:4 at 8-bit, YUV 4:2:2 at 8 and 10-bit
- JPEG-XS compression from intoPIX, in hardware, with sub-frame latency
- 23 x 23 mm, 484-BGA package with dual ARM processors
- M2M RESTful API over UART for your host processor
Target Applications
- PTZ and production cameras
- Gateways and extenders
- Displays and projectors
- Signage, education and IMAG endpoints
- KVM and interactive spaces (HID only)
Your processor drives the ME10 through its M2M RESTful API over UART, NMOS IS-04 and IS-05 make the finished product a discoverable network endpoint, and you are supported by a team that has been involved in shaping the IPMX standard since the beginning. Contact us to discuss your design, or request a quote.
- Features
- Highlights
- Resources
| Feature | Specification |
|---|---|
| Product Name | Macnica ME10 SoC |
| Manufacturer | Macnica |
| General | |
| Function | IPMX to or from HDMI 2.0, configurable as sender (TX) or receiver (RX). One chip covers both roles |
| Package | 23 x 23 mm, 484-pin flip-chip BGA; dual ARM processors; hardware-accelerated media path |
| Interfaces | HDMI 2.0 TX or RX (unidirectional); RGMII for Gigabit Ethernet, media and control; 32-bit DDR3, 256 MB typical, up to 1 GB; 3 x UART, 2 x I2C, SDIO (SD card), QSPI; ULPI USB 2.0 (USB HID class, validation pending); multiple clock input references |
| Networking | |
| Streaming | UDP, RTP, RTCP; multicast and unicast; IGMP v2 and v3; up to 882 Mb/s streaming traffic |
| Standards compliance | |
| IPMX (VSF TR-10) | TR-10-1 Timing; TR-10-2 PCM Audio; TR-10-5 HDCP/HKEP; TR-10-8 NMOS; TR-10-11 Compressed Video. Built on SMPTE ST 2110 and AES67 |
| HDCP | HDCP with HKEP, supported through an OEM-supplied Explore companion chip |
| Media | |
| Video modes | TV (CV): 8-bit RGB/YUV 4:4:4, 8/10-bit YUV 4:2:2; 720p60, 1080p60, 2160p at 23.97 / 30 / 59.94 / 60 fps. PC (IT): 8-bit RGB/YUV 4:4:4; 1024 x 768 at 60 fps. Additional modes are delivered through firmware updates |
| Audio modes | L-PCM 2.0, 5.1 and 7.1; 48 kHz / 24-bit |
| Control plane | |
| Control | External: NMOS IS-04 / IS-05 over a RESTful API. Internal: machine-to-machine (M2M) RESTful API over UART for the host processor. REST API, DHCP, TCP/IP and IGMP on the network side |
* Specifications describe the ME10 SoC and are subject to change without notice.
Fast to Market
The transport layer is finished: JPEG-XS compression, IPMX media transport and timing run in hardware, and the NMOS control plane runs in Macnica firmware on the chip's ARM cores. Design in one chip, or start from the ME10 Gateway Kit's working design, and ship.
- Nothing to integrate: No IP cores to license and fit, no FPGA project on your side, no proprietary ecosystem attached.
- Firmware Macnica maintains: The NMOS control plane and the transport stack are Macnica's, so the standard's evolution is our work, not yours.
- Control from your processor: A machine-to-machine (M2M) RESTful API over UART lets your host processor configure and drive the ME10, so integrating the chip is API calls from the code you already have, not a driver port.
- A certified starting point: The ME10 Gateway Kit, built on this SoC, passed IPMX product certification in August 2026. Evaluate on the kit, or design the SoC in directly.
Right the First Time
Macnica has been part of the IPMX standards community since the start, and the ME10 was designed against the specifications from the silicon up. Your product interoperates with everything built to the same documents, and tracks the standard as it evolves.
- Interoperable by construction: IPMX timing, PCM audio, HDCP/HKEP, compressed video and NMOS control, all implemented to the VSF TR-10 documents.
- Validated on a complete product: Certification attaches to finished products, and the Gateway Kit's certification is the validation of the implementation in this chip.
- Discoverable on the network: NMOS IS-04 and IS-05 make the finished product a standard endpoint that a control system can find and route.
One Chip for Send and Receive
The ME10 is a transceiver: the same 23 x 23 mm part configures as a sender or a receiver, so one chip serves the encoder and the decoder ends of the link. Your processor drives it over UART, and NMOS IS-04 and IS-05 make the finished product a discoverable network endpoint.
- One part number, two products: The encoder and the decoder in your line share a design, a firmware and a supply chain.
- Full 4:4:4 to 4K60p: RGB and YUV 4:4:4 at 8-bit, so desktops, CAD and small type are not thinned out before the encode.
- Media and control on one connection: One standard Ethernet port carries video, audio and NMOS control.
- HDCP through a companion chip: HDCP with HKEP is supported through an OEM-supplied companion chip, with documentation and integration support from Macnica engineering.
Example applications
| Application | Setting | What the ME10 does |
|---|---|---|
| PTZ and production cameras | Live production | The camera joins an IPMX network as a standard source, discovered and routed over IS-04 and IS-05. |
| Gateways and extenders | Pro AV and broadcast facilities | A sender and a receiver carry HDMI across the facility's IP network in place of a point-to-point cable. |
| Displays and projectors | Signage, education, IMAG | A receive-configured ME10 drives the display directly from the network. |
| KVM and interactive spaces (HID only) | Corporate, control rooms | Sub-frame latency keeps a networked operator position responsive. |