UDP100G-IP, 100G UDP Offload

dg-udp dg-udp

Hardware UDP and IP framing for 100G that sustains line rate with deterministic behavior.

UDP100G-IP builds and parses UDP frames in logic and connects to 100G MAC and PHY. Programmable buffering and a straightforward streaming interface simplify integration with high bitrate pipelines.

Highlights

  • Hardware UDP and IPv4 handling with checksum, header fields, and ports
  • AXI-Stream or FIFO data options with register control
  • Programmable buffers for burst absorption and deep streams
  • Reference designs for 100G verification and long-run stability tests
Macnica workflow diagram Macnica workflow diagram

Why Macnica?

  • Stream design reviews that match packet sizes, PPS targets, and jitter tolerances
  • Jumbo frame and buffer tuning to avoid drops during sustained bursts
  • Integration with NVMe-IP for local spooling and with TLS1.3-IP when security is required
  • Test playbooks for soak and corner cases so your team can sign off with confidence
  • Hardware selection support for optics, cables, and adapters that match your budget and reach

Key Specifications

  • Ethernet: 100 GbE
  • User interfaces: AXI-Stream or FIFO for payload, register control
  • Resources: No external DDR, no CPU

Typical Applications

  • High bitrate video and sensor streaming
  • Packet generators and recorders
  • 100G data pumps for analytics

Resources

Get Started

Tell us stream count, packet sizes, and burst profile. We will size buffers and provide a demo path.

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