raNVMe-IP, Random Access NVMe Host

NVMeTCP-IP, NVMe over TCP Host for FPGAs NVMeTCP-IP, NVMe over TCP Host for FPGAs

Random I/O optimized NVMe host in pure logic for very high IOPS without a CPU or external DDR.

raNVMe-IP is purpose built for small block, random access workloads. The core handles command processing and data movement in hardware, so designs achieve consistent latency and high IOPS without software overhead. It is a strong fit for key value lookups, metadata stores, randomized capture, and mixed read or write probes where predictability matters.

Highlights

  • Hardware NVMe host optimized for random I/O
  • No CPU and no external DDR required
  • Multiple in-flight commands and queue management for small block traffic
  • Simple user interfaces, including FIFO or AXI-style handshakes
  • Compact resource usage compared to CPU-based stacks
  • Reference designs available to shorten bring up

Why Macnica?

  • Architecture and sizing guidance for Agilex platforms
  • SSD selection and topology recommendations for target IOPS and queue depth
  • Evaluation adapters and kits to validate quickly
  • Supply chain support from prototype to production
     
Macnica workflow diagram Macnica workflow diagram

Key Specifications

  • Storage protocol: NVMe to NVMe SSDs
  • Host resources: Pure RTL implementation, no external DDR, no embedded CPU
  • User interfaces: Register control and streaming data paths for random reads and writes
  • Integration: Works with Altera PCIe hard IP on supported boards
  • Collateral: Getting started notes, reference design, and test guidance available

Typical Applications

  • Key value databases and index lookups
  • Randomized test traffic generation and analysis
  • Metadata heavy pipelines and object stores
  • Mixed analytics and logging with frequent small updates

Evaluation Hardware

  • AB20-U2PCI U.2 adapter for up to four U.2 or U.3 NVMe SSDs
  • AB19-M2PCI M.2 adapter for up to four M.2 NVMe SSDs
  • AB17-M2FMC FMC adapter for up to two M.2 NVMe SSDs

Supported Platforms

  • Altera Agilex evaluation boards via provided reference designs
  • Contact us to confirm device coverage and resource fit for your project

Resources

Title
Download
Random Access NVMe IP Core Datasheet

Get Started

Tell us your target IOPS, queue depth, and SSD count. We will recommend a sizing path, a demo setup, and the right adapter set for your Agilex platform.