Terasic DE25-Standard Development and Education Kit

Terasic DE25-Standard Development and Education Kit

Extending the successful heritage of the Terasic DE10-Standard in both Commercial and Education applications, the DE25-Standard Development and Education Kit expands these applications by upgrading to the latest Altera Agilex-5 FPGA which supports new high-speed interfaces and devices such as MIPI cameras and DDR4 memory.

 

 

 

 

Terasic DE25-Standard Development Kit - Layout

The Agilex A5ED013BB32A FPGA increases the available FPGA logic to 138KLE and 8.42Mbits of embedded memory. The 128x64 LCD display, the 8-channel ADC, 24-bit audio codec, the IR TX/RX, 64MB SDRAM, 2x20 GPIO header and HSMC connector with four upgraded 28.1Gbps transceivers maintain backwards compatibility with legacy DE10-Standard applications. The VGA output has been upgraded to an HDMI 1.4 output to support modern LCD monitors. With the addition of the MIPI CSI camera interface, accelerometer and on-FPGA tensor blocks (up to 5.78 INT8 TOPS), the DE25-Standard is an excellent development platform for AI and machine vision applications.

 

 

 

The integrated ARM cores have been upgraded to dual ARM Cortex A76 cores and dual ARM Cortex A55 cores operating up to 1.4GHz and 1.25GHz, respectively. This heterogenous ARM architecture permits the Cortex A76 cores to handle the application-level tasks while the Cortex A55 cores handle the real-time hardware management tasks. The ARM cores (HPS) are connected to 1GB of external DDR4 memory which can shared with the FPGA. The HPS peripheral connectors include the RJ45 Gigabit Ethernet, UART to USB, MicroSD socket and two USB Type-A host ports. An on-board USB Blaster III interface is included to permit immediate FPGA and application code development.

 

 

 

Block Diagram

Terasic DE25-Standard Development and Education Kit - Block Diagram

 

A Linux build for the DE25-Standard with BSP support and several FPGA design examples such as a Sony MIPI camera demo are available from the Terasic website. The Terasic DE25-Standard is in-stock and available for immediate delivery.

 

Key Features

  • High-Performance FPGA: Powered by the Intel Agilex™ FPGA A5ED013BB32AE4S for speed and power breakthroughs.
  • Versatile Connectivity: Includes PCI Express Gen 4.0 x16, two 200G QSFP-DD connectors for network interface, and PCIe drivers.
  • Adaptable Acceleration: Offers 1GB DDR4 with 32-bit data bus (no ECC), shared with FPGA for efficient data processing.
  • Intel OpenCL™ Support: Fully compatible with Intel OpenCL™ BSP and Intel oneAPI Toolkits for optimal Computer Vision and Deep Learning solutions.
  • Comprehensive System Monitoring: Equipped with temperature sensors, power monitors, auto fan control, and shutdown control for efficient operation.

 

Target Markets

  • Education
  • Robotics
  • AI and Machine Vision
  • Industrial and Embedded Systems
  • Test and Measurement