SiTime Jitter Cleaners

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MEMS Jitter Cleaners for Ultra-Low Phase Noise
SiTime’s jitter attenuators and phase noise filters are designed for systems demanding the highest signal integrity. Optimized for timing-sensitive high-speed links (PCIe Gen 5/6, 100GbE, etc.), these solutions offer industry-leading power supply noise rejection and stability.
Products
Epoch™
Ultra-Low Jitter for PCIe Gen 6 and High-Speed Systems
The Epoch™ platform is SiTime’s highest-performance jitter cleaner, engineered for:
- PCIe Gen 5/6, 100/200/400/800 GbE
- Optical modules, edge routers, and coherent optics
- Replacing bulky quartz-based jitter attenuators with programmable MEMS timing
SiT5801
- Integrated Phase Jitter: <100 fs typical
- Supported Inputs: LVCMOS, differential
- Outputs: 2 differential
- Frequencies: 100 MHz, 156.25 MHz, 212.5 MHz, 312.5 MHz, 400 MHz
- Target Standards: PCIe Gen 5/6, IEEE 802.3, CPRI, eCPRI
- Applications: Optical transceivers, switches/routers, base stations
Key Features:
- Best-in-class PSNR (Power Supply Noise Rejection)
- Dual-output, programmable jitter cleaner
- AEC-Q100 grade options available for automotive/industrial
Chorus™
Low Jitter Programmable Clock + Jitter Cleaning
Chorus-branded devices include integrated PLLs with jitter attenuation, phase noise filtering, and support for multiple outputs, combining low-jitter synthesis and clean distribution in a compact footprint.
SiT95210 / SiT95211
- Up to 4 differential outputs
- Programmable frequencies (up to 2.1 GHz)
- Supports LVPECL, LVDS, HCSL, LVCMOS
- Designed for jitter cleaning and generation in systems like:
- 10/25/40/100/400 GbE, PCIe Gen 4/5
- SATA, SAS, XAUI, Fibre Channel
SiT95314
- Dual PLL, 8-output jitter cleaner
- On-chip hitless switching, skew alignment, frequency translation
- Flexible PLL configuration for clock redundancy and cleaning
SiT5376 / SiT5377
- MEMS-based, ultra-low jitter differential oscillators
- Often used in Chorus-style configurations for SerDes and FPGA reference clocks
- Compatible with PCIe, Ethernet, JESD204B/C
Key Features:
- Programmable PLL configuration
- Industry-leading low phase noise
- Seamless integration into existing FPGA/SoC clock architectures
Product Summary
Platform | Products | Key Features | Applications |
---|---|---|---|
Epoch™ | SiT5801 | <100 fs jitter, dual outputs, PTP/PCIe Gen 6 support | Optical transceivers, high-speed comms |
Chorus™ | SiT95210, SiT95211, SiT95314, SiT5376 | Multi-output jitter cleaners, ultra-low phase noise | Networking, PCIe, FPGA clocking |
Features
- Supports integrated PLL with jitter attenuation
- Compliant with industry standards (PCIe, Ethernet, IEEE 1588)
- Fast start-up, low power, and compact footprint
Applications
- Hyperscale data centers
- 5G RRHs
- Optical modules
- Enterprise switches
- Satellite comms